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Digital VLSI SoC Design and Planning

Course Provider

Course Highlights:

Dive into Physical Design, where the journey from RTL netlist to final tape-out unfolds, filled with challenges and discoveries. The Google-SkyWater open-source 130nm PDK and Openlane flow are revolutionizing ASIC design, making "an IC for everyone" a closer reality. Join our workshop to master SoC design using this cutting-edge technology.

This course provides:

1. VSD Product-Based Skilling Advantage

a. RISC-V chips and VSDSquadron board built by VSD Student community.

b. Researchers and hobbyists across 153 countries have tested and used it.

c. Get access to 60+ VSD inhouse IPs built by VSD Student community.

2. Chip Tapeout-Oriented Approach using VSD RTL2GDS Flow

a. VSD emphasizes chip tapeout.

b. Focus on real-life scenarios that culminate in tapeout.

c. Offer more practical experience

3. Zero Fees for Tools

a. EDA toolchain is open source.

b. Lifetime access with unlimited licenses,

c. Continue learning and designing even after the program concludes.

4. Career Opportunities

a.Industry recognition for participants who have experience in chip tapeout.

b.Understand how Time-to-market is crucial in this field,

c.Opportunity to work directly on advanced analog, mixed-signal, and RISC-V projects.

5. Cloud-Based Flexibility

a. Self-paced learning

b. Simple login to week's lectures and labs.

c. 24/7 Slack channel with over 150 teaching assistants

What will you learn in this Digital VLSI SoC Design and Planning course?

In this VLSI SoC Design course online, you'll learn the fundamentals and advanced concepts of integrated circuit design. The curriculum guides you through the Place and Route (PnR) process, pivotal in transforming an RTL netlist into a final tape-out ready IC.
You'll gain hands-on experience in creating and characterizing standard cells, such as logic gates and flip-flops, which are the building blocks of digital circuits.
The course provides a detailed walkthrough of the automated RTL2GDSII process, ensuring you understand how to convert high-level designs into a format ready for silicon fabrication. By engaging with EDA tools, you'll contribute to and benefit from the collective progress in the field.
This course equips you with the practical skills to plan and execute SoC design projects using the groundbreaking 130nm process node, positioning you at the forefront of modern IC design.

Digital VLSI SoC Design and Planning

Skill Type
Professional Skills
Domain
Semiconductors

Course Category
VLSI
Nasscom Assessment Coming Soon
Course Covered under GoI Incentive
No
- Course Price
  INR 7,000
  INR 999
  till 10th June 2024
- Course Duration
  2 Weeks

Apply Now

Why should you take this Digital VLSI SoC Design and Planning course?

VSD offers a unique skilling advantage through its RISC-V chips and VSDSquadron board, widely used by a global community.
With access to 60+ in-house IPs, VSD emphasizes a practical, chip tapeout-oriented approach in its RTL2GDS Flow, providing real-life design experience.
The VLSI SoC Design learning path offers zero fees for tools, granting lifetime access to an open-source EDA toolchain, fostering continuous learning.
It opens doors to significant career opportunities, recognizing participants with chip tapeout experience and offering direct involvement in advanced projects.
Additionally, VSD provides VLSI SoC Design certification and cloud-based flexibility for self-paced learning, easy access to materials, and robust support through a 24/7 Slack channel, ensuring a comprehensive and accessible educational experience in chip design and tape-out.

Who should take this Digital VLSI SoC Design and Planning course?

Fresher or recently graduated or experienced professionals looking to brush fundamentals.
Atleast BE/BTech/ME/MTech or equivalent.

Curriculum

Introduction to open-source EDA tools and 130nm PDKs
Floor planning and Standard cell design
Designing and Characterizing a Library Cell
Pre-Layout Timing Analysis and Clock Tree Synthesis
The Final Leap: From RTL2GDS

Tools you will learn in this Digital VLSI SoC Design and Planning course-

Yosys Synthesis Suite
OpenLANE RTL2GDS digital design suite
NGSpice for Characterization
Magic for Layout and Floor planning
OpenSTA for Static timing analysis

FAQs

We've set a special discounted fee of INR 999 (INR7000). Our aim is to make Open-source EDA tools and PDKs accessible for various purposes such as college projects, PhD research, semester lectures, and keeping up with industry trends.

Absolutely! The workshop is hosted on the VSD-IAT cloud platform, offering flexibility to log in at your convenience. The platform is accessible 24 hours a day during the two weeks duration of the workshop.

Definitely! We welcome learners of all ages and backgrounds. Our previous RISC-V workshop included students as young as those in 8th grade. This workshop, while advanced in title, starts with the basics to ensure a solid foundational understanding.

This best VLSI SoC Design course is primarily designed for newcomers to the field of VLSI. However, experienced professionals interested in sharing their expertise with students are more than welcome to join.

Yes, you will receive lifetime access to all lab files. However, access to the videos and the VSD-IAT platform will end with the workshop.

No, all labs will be conducted on the VSD-IAT cloud platform using a Linux Terminal with all necessary tools pre-installed. Post-workshop, we will provide scripts for you to install these tools on your own computer for further practice and revision.

\ Labs will be shared via a virtual box image. You'll receive detailed instructions on accessing and using this image a day before the workshop starts.

Lectures will be delivered through the VSD-IAT LMS platform. This platform allows you to access course materials and interact with the content at your own pace.

Yes, our instructors and Teaching Assistants are available 24/7 on Slack throughout the 14-day workshop to answer questions, provide clarifications, and help.

Indeed, there's a daily one-hour sync-up call during the workshop. This is a valuable time for discussing any immediate issues, challenges, and for receiving direct guidance from instructors and TAs.

Yes, the workshop is hosted on a cloud-based platform, allowing you to access materials and complete tasks at your convenience, ensuring flexibility in your learning schedule.

Apply Now

Digital VLSI SoC Design and Planning

Course Provider

Course Highlights:

What will you learn in this Digital VLSI SoC Design and Planning course?

Digital VLSI SoC Design and Planning

Why should you take this Digital VLSI SoC Design and Planning course?

Who should take this Digital VLSI SoC Design and Planning course?

Curriculum

Tools you will learn in this Digital VLSI SoC Design and Planning course-

FAQs

Key Program Partners

Program Supporters

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Digital VLSI SoC Design and Planning

Course Provider

Course Highlights:

What will you learn in this Digital VLSI SoC Design and Planning course?

Digital VLSI SoC Design and Planning

Why should you take this Digital VLSI SoC Design and Planning course?

Who should take this Digital VLSI SoC Design and Planning course?

Curriculum

Tools you will learn in this Digital VLSI SoC Design and Planning course-

FAQs